元器件交易网www.cecb2b.com SN54LVT125, SN74LVT1253.3-V ABT QUADRUPLE BUS BUFFERSWITH 3-STATE OUTPUTSSCBS133D – MAY 1992 – REVISED JULY 1995DState-of-the-Art Advanced BiCMOSDDDDDDDD descriptionNC – No internal connectionThese bus buffers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability toprovide a TTL interface to a 5-V system environment.The ′LVT125 feature independent line drivers with 3-state outputs. Each output is in the high-impedance statewhen the associated output-enable (OE) input is high.Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.The SN74LVT125 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin countand functionality of standard small-outline packages in less than half the printed-circuit-board area.The SN54LVT125 is characterized for operation over the full military temperature range of –55°C to 125°C. TheSN74LVT125 is characterized for operation from –40°C to 85°C.Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.UNLESS OTHERWISE NOTED this document contains PRODUCTIONDATA information current as of publication date. Products conform tospecifications per the terms of Texas Instruments standard warranty.Production processing does not necessarily include testing of allparameters.POST OFFICE BOX 655303 DALLAS, TEXAS 75265Copyright © 1995, Texas Instruments Incorporated•GNDNC3Y3ATechnology (ABT) Design for 3.3-VOperation and Low-Static PowerDissipationSupport Mixed-Mode Signal Operation (5-VInput and Output Voltages With 3.3-V VCC)Support Unregulated Battery OperationDown to 2.7 VTypical VOLP (Output Ground Bounce)< 0.8 V at VCC = 3.3 V, TA = 25°CESD Protection Exceeds 2000 V PerMIL-STD-883C, Method 3015; Exceeds200 V Using Machine Model (C = 200 pF, R = 0)Latch-Up Performance Exceeds 500 mAPer JEDEC Standard JESD-17Bus-Hold Data Inputs Eliminate the Needfor External Pullup ResistorsSupport Live InsertionPackage Options Include PlasticSmall-Outline (D), Shrink Small-Outline(DB), and Thin Shrink Small-Outline (PW)Packages, Ceramic Chip Carriers (FK), andCeramic (J) DIPsSN54LVT125...J PACKAGESN74LVT125...D, DB, OR PW PACKAGE(TOP VIEW)1OE1A1Y2OE2A2YGND1234567141312111098VCC4OE4A4Y3OE3A3YSN54LVT125...FK PACKAGE(TOP VIEW)1YNC2OENC2A1A1OENCVCC4OE45678321201918171615149101112134ANC4YNC3OE2Y1元器件交易网www.cecb2b.comSCBS133D – MAY 1992 – REVISED JULY 1995SN54LVT125, SN74LVT1253.3-V ABT QUADRUPLE BUS BUFFERSWITH 3-STATE OUTPUTSFUNCTION TABLE(each buffer)INPUTSOELLHAHLXOUTPUTYHLZ logic symbol†1OE1A2OE2A3OE3A4OE4A12451091312EN1361Y2Ylogic diagram (positive logic)1OE1A1245631Y8112OE3Y2A4Y3OE2Y1098†This symbol is in accordance with ANSI/IEEE Std 91-1984and IEC Publication 617-12.3A3Y4OE4APin numbers shown are for the D, DB, J, and PW packages.1312114Yabsolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 VInput voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 VVoltage range applied to any output in the high state or power-off state, VO (see Note 1) . . . . –0.5 V to 7 VCurrent into any output in the low state, IO:SN54LVT125 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mASN74LVT125. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mACurrent into any output in the high state, IO (see Note 2):SN54LVT125. . . . . . . . . . . . . . . . . . . . . . . . . 48 mASN74LVT125. . . . . . . . . . . . . . . . . . . . . . . . . 64 mAInput clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mAOutput clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mAMaximum power dissipation at TA = 55°C (in still air) (see Note 3):D package. . . . . . . . . . . . . . . . . . . . 1.25 WDB or PW package. . . . . . . . . . . . . 0.5 WStorage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C‡Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.NOTES:1.The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.2.This current flows only when the output is in the high state and VO > VCC.3.The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.For more information, refer to the Package Thermal Considerations application note in the 1994 ABT Advanced BiCMOS TechnologyData Book, literature number SCBD002B.2POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.com SN54LVT125, SN74LVT1253.3-V ABT QUADRUPLE BUS BUFFERSWITH 3-STATE OUTPUTSSCBS133D – MAY 1992 – REVISED JULY 1995recommended operating conditions (see Note 4)SN54LVT125MINVCCVIHVILVIIOHIOL∆t/∆vSupply voltageHigh-level input voltageLow-level input voltageInput voltageHigh-level output currentLow-level output currentInput transition rise or fall rateOutputs enabled–552.720.85.5–244810125–40MAX3.6SN74LVT125MIN2.720.85.5–32641085MAX3.6UNITVVVVmAmAns/V°CTAOperating free-air temperatureNOTE 4:Unused control inputs must be held high or low to prevent them from floating.electrical characteristics over recommended operating free-air temperature range (unlessotherwise noted)PARAMETERVIKTESTCONDITIONSTEST CONDITIONSVCC = 2.7 V,VCC = MIN to MAX‡,VCC = 2.7 V,VCC = 3 V=3VVCC = 2.7 V=27VVOLVCC = 3 V=3VII = –18 mAIOH = –100 µAIOH = –8 mAIOH = –24 mAIOH = –32 mAIOL = 100 µAIOL = 24 mAIOL = 16 mAIOL = 32 mAIOL = 48 mAIOL = 64 mAVI = 5.5 VVI = VCC or GNDVI = VCCVI = 0VI or VO = 0 to 4.5 VVI = 0.8 VVI = 2 VVO = 3 VVO = 0.5 VOutputs highICCVCC = 3.6 V,VI = VCC or GNDIO = 0,Outputs lowOutputsdisabled0.124.50.12Control inputsDatainputsData inputsSN54LVT125MINTYP†MAX–1.2VCC–0.22.4220.20.50.40.50.550.5510±11–575–755–50.1970.190.348480.124.50.1275–755–50.1970.190.2mApFpFmA10±11–5±100DatainputsData inputsµAµAµAµAµA 0.20.50.40.5VVCC–0.22.4SN74LVT125MINTYP†MAX–1.2UNITVVOHVVCC = 0 or MAX‡,IIVCC = 3.6 VVCC = 0,VCC = 3 V=3VVCC = 3.6 V,VCC = 3.6 V,IoffII(hold)I(hld)IOZHIOZL∆ICC§CiCoVCC = 3 V to 3.6 V,One input at VCC – 0.6 V,Other inputs at VCC or GNDVI = 3 V or 0VO = 3 V or 0†All typical values are at VCC = 3.3 V, TA = 25°C.‡For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.§This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.PRODUCT PREVIEW information concerns products in the formative ordesign phase of development. Characteristic data and otherspecifications are design goals. Texas Instruments reserves the right tochange or discontinue these products without notice.POST OFFICE BOX 655303 DALLAS, TEXAS 75265•3元器件交易网www.cecb2b.comSCBS133D – MAY 1992 – REVISED JULY 1995SN54LVT125, SN74LVT1253.3-V ABT QUADRUPLE BUS BUFFERSWITH 3-STATE OUTPUTS switching characteristics over recommended operating free-air temperature range, CL = 50 pF(unless otherwise noted) (see Figure 1)SN54LVT125PARAMETERFROM(INPUT)TO(OUTPUT)VCC = 3.3 V± 0.3 VMINtPLHtPHLtPZHtPZLtPHZtPLZAOEOEYYY1111.11.81.3MAX4.24.14.94.95.34.7VCC = 2.7 VMINMAX4.75.16.26.75.94.2SN74LVT125VCC = 3.3 V± 0.3 VMINTYP†MAX1111.11.81.32.72.93.43.43.72.643.94.74.75.14.5VCC = 2.7 VMINMAX4.54.966.55.74nsnsnsUNIT†All typical values are at VCC = 3.3 V, TA = 25°C.PRODUCT PREVIEW information concerns products in the formative ordesign phase of development. Characteristic data and otherspecifications are design goals. Texas Instruments reserves the right tochange or discontinue these products without notice.4POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.com SN54LVT125, SN74LVT1253.3-V ABT QUADRUPLE BUS BUFFERSWITH 3-STATE OUTPUTSSCBS133D – MAY 1992 – REVISED JULY 1995PARAMETER MEASUREMENT INFORMATION6 VFrom Output Under TestCL = 50 pF(see Note A)500 ΩS1OpenGND500 ΩTESTtPLH/tPHLtPLZ/tPZLtPHZ/tPZHS1Open6 VGNDLOAD CIRCUIT FOR OUTPUTStw2.7 VInput1.5 V1.5 V0 VVOLTAGE WAVEFORMSPULSE DURATION2.7 VInputtPLHOutputtPHLOutput1.5 V1.5 V1.5 V1.5 V0 VtPHL1.5 VtPLHVOH1.5 VVOLVOLTAGE WAVEFORMSPROPAGATION DELAY TIMESINVERTING AND NONINVERTING OUTPUTSVOHVOL2.7 VTiming Input1.5 V0 VtsuData Input1.5 Vth2.7 V1.5 V0 VVOLTAGE WAVEFORMSSETUP AND HOLD TIMES2.7 V1.5 VtPZLOutputWaveform 1S1 at 6 V(see Note B)OutputWaveform 2S1 at GND(see Note B)tPZHtPLZ1.5 VtPHZVOH – 0.3 VVOH[ 0 VVOLTAGE WAVEFORMSENABLE AND DISABLE TIMESLOW- AND HIGH-LEVEL ENABLING3 VVOL + 0.3 VVOL1.5 V0 VOutputControl1.5 VNOTES:A.CL includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.Waveform2 is for an output with internal conditions such that the output is high except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns.D.The outputs are measured one at a time with one transition per measurement.Figure 1. Load Circuit and Voltage WaveformsPOST OFFICE BOX 655303 DALLAS, TEXAS 75265•5元器件交易网www.cecb2b.comSN54LVT125, SN74LVT1253.3-V ABT QUADRUPLE BUS BUFFERSSCBS133D – MAY 1992 – REVISED JULY 1995WITH 3-STATE OUTPUTS6POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.com
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