Error correction apparatus and solid state image c

专利名称：Error correction apparatus and solid state

image capturing apparatus using the same

发明人：Toshiyuki Yasui,Yasushi Fukushima申请号：US08/838638申请日：19970409公开号：US06081917A公开日：20000627

摘要：An error correction apparatus corrects erroneous data and reduces

deformation of a displayed picture when inputted data are high frequency data aroundthe erroneous data. R, G and B channel signals of data are inputted via input nodes 1a, 1band 1c. A controller generates signals ch1 and ch2 which specify the erroneous datachannel and a channel for data correction according to a control signal C from an errordetection circuit. A correction data circuit generates correction data. For example, if G(i) isassumed to be erroneous data, the correction data circuit generates correction data asG'(i)=R(i)+G(i+1)-R(i-1) based on the previous data G(i-1) provided by a delay circuit andthe data of the other errorless channel. The erroneous data G(i) is replaced with thecorrection data G'(i) and a set of corrected data R(i), G'(i) and B(i) is outputted as outputdata.

申请人：MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

代理机构：Merchant & Gould P

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